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Carry Select adder

This project is aimed at developing/Creating a design to improve the performance of current design in terms of Speed,Power etc.

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This project is aimed at developing/Creating a design to improve the performance of current design in terms of Speed,Power etc. The carry-se

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Project Overview

The carry-select adder generally consists of two ripple carry adders and a multiplexer. Adding two n-bit numbers with a carry-select adder is done with two adders (therefore two ripple carry adders) in order to perform the calculation twice, one time with the assumption of the carry-in being zero and the other assuming it will be one. After the two results are calculated, the correct sum, as well as the correct carry-out, is then selected with the multiplexer once the correct carry-in is known.

Aim is to design Improved Adder in terms of performance.

Project Steps

  • Study about existing Schemes.
  • Suggest Changes in Existing Scheme.
  • Implement it using Verilog.
  • Performance analysis of proposed design.
  • Present a Research Paper on it.

Where I Need the Most Help

  • Present new ideas for design improvement.
  • Implementing new design using verilog.

Why I’m Passionate About This Project

  • Adders can be constructed for many numerical representations, such as BCD or Excess-3, the most common adders operate on binary numbers.

  • Adders plays major role in multiplications and other advanced processors designs.

  • Carry Select Adder (CSLA) is one of the fastest adders used in many data-processing processors to perform fast arithmetic functions.

  • By gate level modification of CSLA architecture, we can reduce area, power and delay.

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